Tested with Synopsys 2006.06 sp4, you may be able to use earlier versions, but if you do make sure that you are using the "Presto" compiler.

To load, The easiest way is to add the following lines into your compile script (You need only load the packages you need):

define_design_lib ieee_proposed -path ./ieee_proposed
analyze -w ieee_proposed -f vhdl standard_additions_c.vhdl
analyze -w ieee_proposed -f vhdl std_logic_1164_additions.vhdl
analyze -w ieee_proposed -f vhdl numeric_std_additions.vhdl
analyze -w ieee_proposed -f vhdl numeric_std_unsigned_c.vhdl
analyze -w ieee_proposed -f vhdl math_utility_pkg.vhdl
analyze -w ieee_proposed -f vhdl fixed_pkg_c.vhdl
analyze -w ieee_proposed -f vhdl float_pkg_c.vhdl
# analyze -w work -f vhdl float_synth.vhdl

Included in this ZIP file are the following packages (only include the ones you need):

The "README" file in the ZIP file will give you a list of the new functions.

See the README for an explination of the new functions in these packages. You will also want to look at the Fixed point docuementation and the Floating point docuementation.

Notes: